Return-Path: Received: from moutng.kundenserver.de ([212.227.17.10] verified) by media-motion.tv (CommuniGate Pro SMTP 4.2.10) with ESMTP-TLS id 4901203 for AE-List@media-motion.tv; Fri, 16 Nov 2012 06:14:50 +0100 Received: from oxbaltgw15.schlund.de (oxbaltgw15.schlund.de [172.19.246.21]) by mrelayeu.kundenserver.de (node=mreu4) with ESMTP (Nemesis) id 0LeWL4-1SxBXz1YHW-00pmX6; Fri, 16 Nov 2012 06:18:09 +0100 Date: Fri, 16 Nov 2012 06:18:09 +0100 (CET) From: "mylenium@mylenium.de" Reply-To: "mylenium@mylenium.de" To: After Effects Mail List Message-ID: <530258215.776576.1353043089375.JavaMail.open-xchange@email.1und1.de> In-Reply-To: References: Subject: Re: [AE] [OT] Intel's 50-core Xeon Phi Processor MIME-Version: 1.0 Content-Type: multipart/alternative; boundary="----=_Part_776575_1543018484.1353043089312" X-Priority: 3 Importance: Medium X-Mailer: Open-Xchange Mailer v6.20.7-Rev2 X-Provags-ID: V02:K0:B+esY+F0iugQux4L7BqjVtQLILVcq0RwVjaWedaIw9l LyJIUisScR+KWNUn9CGEqDBev8RoBpcdRa2gzUQ7gJHwKHUNIl KpqPQjhZnaYX5RqhoN3CjNUS6nsCx0BBmzR8Dp8pnayxbdfBvn XBww0R9zpWUnypZxIYWUGrfXHLTGYOyKakTQFsS585Uoz86Qs0 wkIkCm8F1p1aUNWmA8yoiIViLMcOZPkZ8rzkAJ6mMen2AsJtEK SfAEfSxlT1QLs+W94T5nMjdfOR5PwPPyRZuxUWprljeFaXwWlN Kdwj57ulLENB/GrXvYCl4fUd4fONj4e/8OuXUGCHEj0hPufT9L jBk7Kd/ncSWekPlauTwGp5KuO7RwjbitDgPSwZa/zYQyOEux1d Z4CPgoXX05io/TK8U6rYSsYuAEghrbkUeU= ------=_Part_776575_1543018484.1353043089312 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Yes, of course. All sorts of SPH, grid based or whatever simulations/ solve= rs naturally can be included in this illustrious circle. Mylenium [Pour Myl=C3=A8ne, ange sur terre] ----------------------------------------- www.mylenium.de Teddy Gage hat am 16. November 2012 um 05:20 geschrie= ben: >=20 > Don't forget fluid simulation and other dynamic particles. Real flow can > utilize hundreds of CPUs with very low memory overhead. I've always wante= d to > test out a Maximus setup, now maybe I could afford a phi. >=20 > On Nov 15, 2012 10:34 PM, " mylenium@mylenium.de > " < mylenium@mylenium.de > > wrote: > > > Not sure what the fuss is about. Your normal Xeon processor has= 8MB > > > of L3 caches and you don't store image buffers in that, either. Fr= om > > > what little reading I have done on the Phi card, internally all me= mory > > > management and syncing is handled by the processors themselves via= ring > > > buses and crossbar switches in groups of 2, 4 or 8 cores, but that= only > > > really includes the caches and the internal processing queue. Also= by > > > the time you would process data on the card it would long be > > > pre-segmented and unlike graphics cards, there would be no persist= ent > > > buffers requiring extensive amounts of memory. The rest would be > > > handled in the system memory and the beauty of it is that since th= e Phi > > > card uses native x86/SSE etc. commands, there is no need for any e= xtra > > > data conversions or explicitly shuffling stuff around beyond what = your > > > system already does, anyway. Of course on some level it still has > > > similar requirements like CUDA in terms of parallelizing stuff, bu= t as > > > Greg said, the biggest issue for the card at this point will be li= mited > > > PCI transfer speeds. That's why primarily it will make inroads in > > > science first most likely as well as 3D renderers that already to = data > > > segmentation/ bucketing/ tiling and by comparison the processing > > > outweighs the data transfers. I wouldn't expect it to be relevant = for > > > anything else soon. Where intel will take this technology is anoth= er > > > question considering how they have been mucking around for years, = but > > > generally I would not expect them to follow the same road that CUD= A > > > has. > >=20 > > Mylenium > >=20 > > [Pour Myl=C3=A8ne, ange sur terre] > > ----------------------------------------- > > www.mylenium.de > >=20 > > Steve Oakley < steveo@practicali.com = > hat > > am 15. November 2012 um 23:15 geschrieben: > >=20 > > > > > my math says each CPU would get 161mb of RAM.... despite what > > > > > intel says, writing code to work well in this environment wou= ld > > > > > not really be much different than CUDA. you certainly could n= ot > > > > > run an OS + App + App data on each core. thats fantasy. you c= ould > > > > > probably write a renderer to fit into that space and have som= e > > > > > image buffers.... but when you watch AE eat a couple gigs for > > > > > large deep color renders, their model pretty much doesn't wor= k. At > > > > > best, you instead would need to MP render each frame, tiling = it up > > > > > and feeding each CPU a chunk of it. very different than what = intel > > > > > is pitching. you'd need more like 64gb or 128gb to really mak= e it > > > > > work they way they say. > > >=20 > > >=20 > > > S > > >=20 > > > On Nov 15, 2012, at 4:06 PM, Byron Nash < byronnash@gmail.com > > > > wrote: > > >=20 > > >=20 > > > > > > > So, in theory would a multi-threaded renderer like Me= ntal > > > > > > > Ray be able to utilize all those coprocessor cores? I= f so, > > > > > > > I imagine you would need a lot of RAM in the machine. > > > >=20 > > > >=20 > > > > On Thu, Nov 15, 2012 at 11:20 AM, Greg Balint > > > > wrote: > > > > > > > > > Yes, but the 8Gb on-board can be acce= ssed > > > > > > > > > at 320Gb/s whilst the rest of your System RAM c= an > > > > > > > > > only be accessed by those cores on the PCIe 2.0= card > > > > > > > > > at 16GB/sec. Sounds like a bottleneck, but curr= ent > > > > > > > > > modules Peak Transfer Rates are only around 17G= b/s > > > > > > > > > tops, and that's for DDR3-2133 RAM. The biggest > > > > > > > > > issue would be considering the RAM bus would a= lso > > > > > > > > > be the same bus used for Storage writing and > > > > > > > > > reading, and instruction transit. and what memo= ry > > > > > > > > > controller would control those 50 CPUs access t= o > > > > > > > > > your RAM through your PCIe 2.0 bus.. sounds lik= e it > > > > > > > > > could be a nightmare for applications such as A= E > > > > > > > > > with constant I/O and instructions being sent.. > > > > >=20 > > > > > I'd hope one day I can just go purchase a $1500-$2000 c= ard, > > > > > and basically get an internal render-farm.. but I think software = would > > > > > need to catch up to that concept and it would need to go mainstre= am > > > > > before we'd really see a lot of applications for it.. I do see t= he > > > > > potential, and it seems to pretty much be a given-future.. > > > > > "Core-Boards" will probably end up being the next step up from th= e > > > > > OnBoard Chips. In the future, it'll all be about OC'ing the Core= Board > > > > > and the Motherboard being the controller of that CoreBoard. > > > > >=20 > > > > > Just think.. at some point, there'll probably be > > > > > configurable RAM options on the CoreBoards, and then we'd need > > > > > Integrated Video for these CoreBoards.. > > > > >=20 > > > > > Basically building a full System Build on a Board that = goes > > > > > in your Full System Build... then you can Cross-fire those boards > > > > > together in one Case.. > > > > >=20 > > > > > Turtles all the way down... > > > > >=20 > > > > >=20 > > > > >=20 > > > > > ///Greg Balint > > > > > //Art Director / Motion Graphics Designer > > > > > /321.514.4839 > > > > > delRAZOR.com/ > > > > >=20 > > > > > On 11/15/2012 9:58 AM, mylenium@mylenium.de > > > > > wrote: > > > > >=20 > > > > > > > > > > > It's my understanding tha= t it > > > > > > > > > > > will appear as just another processor t= o the > > > > > > > > > > > system and thus will share the system's > > > > > > > > > > > memory. Those 8GB are more or less just= its > > > > > > > > > > > internal caches. > > > > > >=20 > > > > > > Mylenium > > > > > >=20 > > > > > > [Pour Myl=C3=A8ne, ange sur terre] > > > > > > ----------------------------------------- > > > > > > www.mylenium.de > > > > > >=20 > > > > > > mike cardeiro > > > > > > hat am 15. November 2012 um 15:32 > > > > > > geschrieben: > > > > > >=20 > > > > > > > > > > > > > sounds cool...wonde= r why > > > > > > > > > > > > > they are only allocating 8gb of ra= m > > > > > > > > > > > > > (did you ever think you'd see the = day > > > > > > > > > > > > > when you said *only* 8 gigs of ram= ) > > > > > > >=20 > > > > > > > Mike Cardeiro > > > > > > > Editor/Animator/Compositor > > > > > > > D4 Creative Group - Philadelphia, PA > > > > > > >=20 > > > > > > > http://www.michaelcardeiro.com/resume/ > > > > > > > > > > > > > > http://www.youtube.com/user/mcardeiro > > > > > > > > > > > > > >=20 > > > > > > >=20 > > > > > > >=20 > > > > > > >=20 > > > > > > >=20 > > > > > > > > > > > > > > >=20 > > > > > > > > > > > > > > > ------------= ---------------------------------------------------------------------------= ---------------------------------------------------------------------------= ---------------------------------------------------------------------------= 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> > > From: Satya G Meka (Lists) > > > > > > > > > > > > > > > > To: After Effects Mail List > > > > > > > > > > > > > > > > Sent: Thursday, November 15, 2012 9:22 AM > > > > > > > > Subject: [AE] [OT] Intel's 50-core Xeon Ph= i > > > > > > > > Processor > > > > > > > >=20 > > > > > > > > Fellow Ae-Listers, > > > > > > > >=20 > > > > > > > > You might find this interesting. > > > > > > > >=20 > > > > > > > > http://www.drdobbs.com/parallel/intels-50-c= ore-xeon-phi-the-new-era-of-i/240105810?donkey > > > > > > > > > > > > > > > >=20 > > > > > > > > I do wish it competes directly with GPUs i= n the > > > > > > > > future. > > > > > > > >=20 > > > > > > > > regards, > > > > > > > > Satya. > > > > > > > >=20 > > > > > > > >=20 > > > > > > > > > > > > > > >=20 > > > > > > > > > > > > >=20 > > > > > >=20 > > > > > > > > > > > > > > >=20 > > > > > > >=20 > > > > >=20 > > >=20 ------=_Part_776575_1543018484.1353043089312 MIME-Version: 1.0 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable =20 =20 =20 =20
Yes, of course. All sorts of SPH, grid based or whatever simulations/ so= lvers naturally can be included in this illustrious circle.
=20
 
=20
Mylenium
=20
 
=20
[Pour Mylène, ange sur terre]
-----------------------------------------
www.mylenium.de
=20

Teddy Gage <teddygage@gmail.com> hat am 16. November 2012 u= m 05:20 geschrieben:
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Don't forget fluid simulation and other dynamic particles. Real = flow can utilize hundreds of CPUs with very low memory overhead. I've a= lways wanted to test out a Maximus setup, now maybe I could afford a phi.=20

On Nov 15, 2012 10:34 PM, " mylenium@mylenium.de" = < mylenium@mylenium.de> = wrote:
=20
=20
=20
Not sure what the fuss is about. Your normal Xeon processor has 8MB= of L3 caches and you don't store image buffers in that, either. From w= hat little reading I have done on the Phi card, internally all memory manag= ement and syncing is handled by the processors themselves via ring buses an= d crossbar switches in groups of 2, 4 or 8 cores, but that only really incl= udes the caches and the internal processing queue. Also by the time you wou= ld process data on the card it would long be pre-segmented and unlike graph= ics cards, there would be no persistent buffers requiring extensive amounts= of memory. The rest would be handled in the system memory and the beauty o= f it is that since the Phi card uses native x86/SSE etc. commands, there is= no need for any extra data conversions or explicitly shuffling stuff aroun= d beyond what your system already does, anyway. Of course on some level it = still has similar requirements like CUDA in terms of parallelizing stuff, b= ut as Greg said, the biggest issue for the card at this point will be limit= ed PCI transfer speeds. That's why primarily it will make inroads in sc= ience first most likely as well as 3D renderers that already to data segmen= tation/ bucketing/ tiling and by comparison the processing outweighs the da= ta transfers. I wouldn't expect it to be relevant for anything else soo= n. Where intel will take this technology is another question considering ho= w they have been mucking around for years, but generally I would not expect= them to follow the same road that CUDA has.
=20
 
=20
Mylenium
=20
 
=20
[Pour Mylène, ange sur terre]=20
-----------------------------------------=20
www.mylenium.d= e
=20

Steve Oakley < steveo@p= racticali.com> hat am 15. November 2012 um 23:15 geschrieben:
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my math says each CPU would get 161mb of RAM.... despite what inte= l says, writing code to work well in this environment would not really be m= uch different than CUDA. you certainly could not run an OS + App + App data= on each core. thats fantasy. you could probably write a renderer to fit in= to that space and have some image buffers.... but when you watch AE eat a c= ouple gigs for large deep color renders, their model pretty much doesn'= t work. At best, you instead would need to MP render each frame, tiling it = up and feeding each CPU a chunk of it. very different than what intel is pi= tching. you'd need more like 64gb or 128gb to really make it work they = way they say.=20
 
=20
 
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S
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On Nov 15, 2012, at 4:06 PM, Byron Nash <=20 byronn= ash@gmail.com> wrote:
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So, in theory would a multi-threaded renderer like Mental Ray b= e able to utilize all those coprocessor cores? If so, I imagine you would n= eed a lot of RAM in the machine.=20

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On Thu, Nov 15, 2012 at 11:20 AM, Greg Balint=20 <greg@delrazor.com> wrote:=20
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Yes, but the 8Gb on-board can be accessed at 320Gb/s whils= t the rest of your System RAM can only be accessed by those cores on the PC= Ie 2.0 card at 16GB/sec. Sounds like a bottleneck, but current modules Peak= Transfer Rates are only around 17Gb/s tops, and that's for DDR3-2133 R= AM. The biggest issue would be  considering the RAM bus would also be = the same bus used for Storage writing and reading, and instruction transit.= and what memory controller would control those 50 CPUs access to your RAM = through your PCIe 2.0 bus.. sounds like it could be a nightmare for applica= tions such as AE with constant I/O and instructions being sent..=20
=20
I'd hope one day I can just go purchase a $1500-= $2000 card, and basically get an internal render-farm.. but I think softwar= e would need to catch up to that concept and it would need to go mainstream= before we'd really see a lot of applications for it..  I do see t= he potential, and it seems to pretty much be a given-future.. "Core-Boa= rds" will probably end up being the next step up from the OnBoard Chips= .  In the future, it'll all be about OC'ing the CoreBoard and = the Motherboard being the controller of that CoreBoard.=20
=20
Just think.. at some point, there'll probably be= configurable RAM options on the CoreBoards, and then we'd need Integra= ted Video for these CoreBoards.. =20
=20
Basically building a full System Build on a Board th= at goes in your Full System Build... then you can Cross-fire those boards t= ogether in one Case..=20
=20
Turtles all the way down...=20

=20 
///Greg Balint
//Art Director / Motion Graphics Designer
/321.514.4839
delRAZOR.com/
= =20
=20
On 11/15/2012 9:58 AM,=20 mylenium@mylenium.de wrote:
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It's my understanding that it will appear as just a= nother processor to the system and thus will share the system's memory.= Those 8GB are more or less just its internal caches.
=20
 
=20
Mylenium
=20
 
=20
[Pour Mylène, ange sur terre]=20
-----------------------------------------=20
=20 w= ww.mylenium.de
=20

mike cardeiro=20 <mcardeiro@yahoo.com> hat am 15. November 2012 um 15:32 gesch= rieben:
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sounds cool...wonder why they are only allocat= ing 8gb of ram (did you ever think you'd see the day when you said *onl= y* 8 gigs of ram)
=20

=20
=20
Mike Cardeiro
Editor/Animator/Compositor&= #160;           = 0;   
D4 Creative Group - Philadelphia, PA  =  
          &#= 160;
http://www.michaelcardeiro.com/resume/
http://www.youtube.com/user/= mcardeiro
=20

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=20

=20
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From: Saty= a G Meka (Lists) = 0;lists@rowbyte.com>
<AE-List@media-motion.tv>
= Sent: Thursday,= November 15, 2012 9:22 AM
= Subject: [AE] [OT] Intel's 50-core Xeon Phi Processor
=20
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Fellow Ae-Listers,
=20
 
=20
You might find this interesting.
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I do wish it competes directly with GPUs in the= future.
=20
 
=20
regards,
=20
Satya.
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